Co-Packaged optics and FPGA for 800G data centre AI links

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Canadian photonics company Ranovus has combined its 800Gbit/s optical system with an AMD/Xilinx Versal FPGA to provide machine learning in high speed data centre links. The Ranovus Odin is a low latency, high density, and protocol agnostic optical engine that delivers massive optical interconnect bandwidth with industry-leading cost and power…
By Nick Flaherty

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Canadian photonics company Ranovus has combined its 800Gbit/s optical system with an AMD/Xilinx Versal FPGA to provide machine learning in high speed data centre links.

The Ranovus Odin is a low latency, high density, and protocol agnostic optical engine that delivers massive optical interconnect bandwidth with industry-leading cost and power efficiency. Odin scales from 800Gbps to 3.2Tbps in the same footprint by using monolithic Electro-Photonic Integrated Circuit (EPIC) IP, laser platform and advanced packaging technologies.

这是一个整个的结合ACAP包括FPGAudes machine learning accelerator chiplets using co-packaged optics (CPO). CPO provides Nx100Gbps PAM4 Optical I/O channels for Ethernet switch and ML/AI silicon in a single packaged assembly, which significantly reduces the cost and power consumption of the complete system.

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Ranovus has operations in Ottawa, Nuremberg, and Sunnyvale, USA, developing and manufacturing the photonic systems. The company’s range of IP Cores includes Multi-Wavelength Quantum Dot Laser technology and advanced digital and silicon photonics integrated circuit technologies to reduce power dissipation, size, and cost for the next generation of optical interconnect solutions.

The company launched its Odin Analog Drive CPO 2.0 platform this time last year for Ethernet switch and module applications and eliminates the need for the retimer, resulting in 75% smaller footprint and 40% cost and power consumption savings over the first generation of CPO.

“We’re proud of our collaboration with Ranovus that helped achieve record performance levels while at the same time reducing power and overall footprint of the complete solution,” said Dan Mansur, vice president, Adaptable and Embedded Computing Group, AMD (formerly Xilinx).

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