Intel has built a device with over 100bn transistors for the data centre and supercomputers using a combination of its own Intel 7 process and TSMC N5 5nm.

“Ponte Vecchio is our tour-de-force data centre GPU architecture with Intel’s highest ever compute density. Looking back at just the past year, technology was at the heart of how we all communicated, worked, played and coped through the pandemic. Enormous computing power proved crucial. Looking ahead, we face a massive demand for compute – potentially a 1,000x need by 2025. That 1,000-times boost in four years is Moore’s Law to the power of five,” said Raja Koduri, Senior vice president and General manager of the Accelerated Computing Systems and Graphics Group.

“This is the most complex SoC Intel has ever built and a great example of our IDM 2.0 strategy come to life,” he said. “With this product, we are bringing to life our moon-shot project, the 100 billion-transistor device that delivers industry-leading FLOPs and compute density to accelerate artificial intelligence, high performance computing and advanced analytics workloads.”

There is a discussion on the transistor density for Moore’s Law, based on Intel’s roadmap, atHow long has the semiconductor industry got?

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利用旧桥的年代everal advanced semiconductor processes by using the EMIB technology and Foveros 3D packaging as well as the 5nm process at TSMC. Embedded Multi-die Interconnect Bridge (EMIB) uses a very small bridge die, with multiple routing layers, embedded as part of our substrate fabrication process. All of this creates the 100bn transistors in the system-in-package, rather than a monolithic die.